Rapport

Verification and validation techniques for I&C applications in Nordic NPPs

This report considers the verification and validation (V&V) techniques that can be applied to microprocessors and FPGAs. It finds that many techniques apply similarly to both, but at lower design and implementation levels the tools diverge, particularly when considering mitigations of vulnerabilities.

Techniques for FPGA V&V are generally more comprehensive and integrated into the standard toolchains. Some of this complexity is needed to address extra design vulnerabilities present in FPGAs as compared to microprocessors, but in other areas the resulting analysis is arguably more routine and more thorough than is usually attempted for microprocessors. FPGAs are also free from some particularly difficult uncertainties and intractable analysis problems caused by the presence of operating systems in microprocessor-based platforms. Some behavioural V&V techniques dealing with application level issues such as data flow do not have such obvious analogues in HDL V&V methods based on hardware assertions. Consequentially, it is important to review the whole suite of V&V measures used for a given application to ensure that all abstraction levels are adequately covered, particularly if the resulting justification must interface with another assurance case that has been developed or reviewed by engineers more familiar with microprocessor based V&V processes.